1. Field of the Invention
The present invention relates, in general, to a printed circuit board (PCB) for improving the tolerance of embedded capacitors and a method of manufacturing the same. More particularly, the present invention relates to a PCB including embedded capacitors, which is minimized in a tolerance caused by an etching process and thus can be applied to capacitors for RF matching, and to a method of manufacturing the same.
2. Description of the Related Art
Recently, in electronic products including portable electronic instruments, various demands of consumers are increasing. In particular, in order to diversify functions of the products, to decrease the size and weight thereof, to increase the speed thereof, to reduce the price thereof, to increase portable convenience, to realize wireless internet service at any time, and to satisfy the design requirements of consumers, thorough research into such products has been conducted by developers, designers, and manufacturers.
As the functions of the products become more diversified, the number of passive components is increased in proportion to an increase in the number of ICs, and thus the size of the portable terminal is increased. Generally, electronic instruments have pluralities of active components and passive components, which are mounted on the surface of a circuit substrate. Furthermore, numerous passive components are mounted on the surface of the substrate in the form of discrete chip capacitors to efficiently realize the signal transmission between the active components.
According to demands for high-density mounting of electronic systems, embedded PCBs have been developed in many related companies. Examples of passive components, which are embedded in the substrate, include resistors R, inductances L, and capacitors C. The embedded components are classified into conventional passive components, thin passive components, film elements obtained through printing or sputtering, and plating elements, depending on the size and type thereof. However, discrete chip capacitors, that is, passive components, have limitations in aiding the trend toward the fabrication of light, slim, short and small electronic components, and also have disadvantages in incurring space utilization problems and increasing manufacturing costs.
Therefore, research into methods and types of embedding passive components in a substrate is intensively and extensively conducted. Further, attempts to manufacture the electronic systems to be light, slim, short and small have been continuously made. Among the passive components embedded in the substrate, a film type (15˜25 μm thick) capacitor is mainly embedded in a substrate. Embedment of the film type capacitor in the substrate is achieved by a process using roll coating, sputtering, or sheet lamination technique. In particular, the sheet lamination technique is highly effective in decreasing a thickness tolerance and expense.
In this regard, the process of manufacturing a PCB having embedded capacitors according to a conventional technique is described with reference to FIGS. 2A to 2F.
First, a PCB 10, in which a resin insulating layer 12 having a metal layer 13, such as copper, formed on either surface thereof, for example, RCC (Resin Coated Copper), is laminated on an inner layer 11, is prepared (FIG. 2A). Although not shown in the drawing, the circuit pattern of the inner layer 11 of the PCB 10 is electrically connected to the circuit pattern of an outer layer through a via hole.
Subsequently, using a photoresist (not shown) such as a dry film, typical exposure/development and etching are performed to thus remove the unnecessary portion of the metal layer 13, thereby forming a circuit layer having a lower electrode 14 and a circuit pattern 15 (FIG. 2B).
Then, the circuit patterns 14, 15 are flattened by filling the spaces therebetween with an insulating resin 16 through a typical flat coating process (FIG. 2C). As such, the reason why the flat coating process is additionally conducted is that a dielectric sheet, which is laminated in a subsequent process, is a dielectric layer containing ceramic powder dispersed therein to thus have almost no flowability, and therefore it is not filled in the spaces between circuit patterns upon lamination.
Subsequently, a single-sided dielectric sheet 20 including a dielectric layer 21 and a metal layer 22, such as copper, formed on one surface of the dielectric layer is laminated (FIG. 2D). Using a photoresist (not shown), such as a dry film, typical exposure/development and etching are conducted to thus remove the unnecessary portion of the metal layer 22, thereby forming a circuit layer having an upper electrode 23 and a circuit pattern 24, 25. Further, a via hole for electrically connecting an interlayer circuit having the upper electrode 23 and the lower electrode 14 is formed, thus completing a capacitor C1 (FIG. 2E).
Finally, a resin insulating layer 17 having a metal layer formed on one surface thereof is laminated through a build-up process, and is then patterned, thus forming an outer circuit pattern 18 (FIG. 2F).
However, the above-mentioned conventional process suffers because the circuit pattern including the upper and lower electrodes is formed through exposure/development and etching for a subtractive process, and thus changes in tolerance of the circuit by an etching process are increased. Ultimately, the PCB having embedded capacitors resulting from the conventional process is difficult to apply to capacitors for RF matching, and also, a flat coating process is additionally required.